"An Efficient Hardware Implementation of a Robust and Low-Complexity ADSRC ..."

Huynh Trong Anh et al. (2006)

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DOI: 10.1109/ICECS.2006.379717

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-23

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Huynh Trong Anh, Jinsang Kim, Won-Kyung Cho, Jongchan Choi:
An Efficient Hardware Implementation of a Robust and Low-Complexity ADSRC Timing Synchronization Design. ICECS 2006: 1288-1291

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