"A Low-area Hardware and Architecture Design of Truncation- and ..."

Chieh-Wei Wu et al. (2024)

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DOI: 10.1109/ICCE-TAIWAN62264.2024.10674167

access: closed

type: Conference or Workshop Paper

metadata version: 2024-11-27

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Chieh-Wei Wu, Li-Chieh Wang, Wei-Xun Chen, Yu-Xiang Hong, Shu-Yen Lin:
A Low-area Hardware and Architecture Design of Truncation- and Rounding-Based Approximate Multiplier for Artificial Intelligence Applications. ICCE-Taiwan 2024: 561-562

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