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"Optimal 2-D cell layout with integrated transistor folding."

Name: dblp XML data dump
Creator: Schloss Dagstuhl - Leibniz Center for Informatics
Published: 1993
License: https://creativecommons.org/publicdomain/zero/1.0/
Keywords: dblp, XML, computer science, scholarly publications, metadata

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Avaneendra Gupta, John P. Hayes (1998)

Trier

Dagstuhl

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DOI: 10.1145/288548.288590

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Avaneendra Gupta, John P. Hayes:
Optimal 2-D cell layout with integrated transistor folding. ICCAD 1998: 128-135

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last updated on 2023-03-24 00:01 CET by the dblp team

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