"A logic synthesis system for VHDL design descriptions."

Thomas E. Dillinger et al. (1989)

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DOI: 10.1109/ICCAD.1989.76906

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Thomas E. Dillinger, Kathy M. McCarthy, Thomas A. Mosher, Dale R. Neumann, Randall A. Schmidt:
A logic synthesis system for VHDL design descriptions. ICCAD 1989: 66-69

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