"Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT ..."

An-Yeu Wu, Tsun-Shan Chan (1998)

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DOI: 10.1109/ICASSP.1998.679626

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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An-Yeu Wu, Tsun-Shan Chan:
Cost-efficient parallel lattice VLSI architecture for the IFFT/FFT in DMT transceiver technology. ICASSP 1998: 3517-3520

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