"High performance and cost effective memory architecture for an HDTV ..."

Tetsuro Takizawa, Junji Tajime, Hidenobu Harasaki (1999)

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DOI: 10.1109/ICASSP.1999.758315

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Tetsuro Takizawa, Junji Tajime, Hidenobu Harasaki:
High performance and cost effective memory architecture for an HDTV decoder LSI. ICASSP 1999: 1981-1984

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