"A digital signal processor module architecture and its implementation ..."

K. Okada et al. (1984)

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DOI: 10.1109/ICASSP.1984.1172728

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-19

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K. Okada, T. Ehara, H. Suzuki, K. Yanagida, K. Saito, N. Ichiura:
A digital signal processor module architecture and its implementation using VLSIs. ICASSP 1984: 378-381

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