"Architecture of high-speed 22-bit floating-point digital signal processor."

Yoshikazu Mori et al. (1986)

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DOI: 10.1109/ICASSP.1986.1169045

access: closed

type: Conference or Workshop Paper

metadata version: 2020-09-15

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Yoshikazu Mori, Toshio Jufuku, Masao Iida, Akira Nomura, Noboru Ichiura, Takao Nakamura:
Architecture of high-speed 22-bit floating-point digital signal processor. ICASSP 1986: 405-408

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