"A 32 bit 15M flop floating point programmable signal processor ..."

James H. Hesson (1985)

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DOI: 10.1109/ICASSP.1985.1168480

access: closed

type: Conference or Workshop Paper

metadata version: 2020-08-28

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James H. Hesson:
A 32 bit 15M flop floating point programmable signal processor architecture for VLSI implementation. ICASSP 1985: 196-199

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