"CNPC deinterleaver implementation to increase hardware logic utilization ..."

Gwonhan Mun, Hee Wook Kim, Daeho Kim (2021)

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DOI: 10.1109/ICAIIC51459.2021.9415239

access: closed

type: Conference or Workshop Paper

metadata version: 2024-03-09

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Gwonhan Mun, Hee Wook Kim, Daeho Kim:
CNPC deinterleaver implementation to increase hardware logic utilization on FPGA. ICAIIC 2021: 385-389

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