"VLSI implementation of LNS arithmetic unit by LUT partitioning."

V. Vinod et al. (2017)

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DOI: 10.1109/ICACCI.2017.8126179

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-03

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V. Vinod, K. Eswar, P. Vishnuvardhan, G. Srikanth, S. R. Ramesh:
VLSI implementation of LNS arithmetic unit by LUT partitioning. ICACCI 2017: 2241-2245

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