"VLSI implementation of bit serial architecture based multiplier in ..."

Jitesh R. Shinde, Suresh S. Salankar (2015)

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DOI: 10.1109/ICACCI.2015.7275854

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-25

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Jitesh R. Shinde, Suresh S. Salankar:
VLSI implementation of bit serial architecture based multiplier in floating point arithmetic. ICACCI 2015: 1672-1677

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