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"A Translator from FDL to SystemVerilog for FPGA Implementation of Fuzzy ..."
Yuichi Kamina et al. (2020)
- Yuichi Kamina, Keisuke Iwai, Takashi Matsubara, Takakazu Kurokawa:
A Translator from FDL to SystemVerilog for FPGA Implementation of Fuzzy Inference. CANDAR (Workshops) 2020: 87-92
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