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"Tiered-latency DRAM: A low latency and low cost DRAM architecture."
Donghyuk Lee et al. (2013)
- Donghyuk Lee, Yoongu Kim, Vivek Seshadri, Jamie Liu, Lavanya Subramanian, Onur Mutlu:
Tiered-latency DRAM: A low latency and low cost DRAM architecture. HPCA 2013: 615-626
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