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"Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory ..."
Koji Inoue, Koji Kai, Kazuaki J. Murakami (1999)
- Koji Inoue, Koji Kai, Kazuaki J. Murakami:
Dynamically Variable Line-Size Cache Exploiting High On-Chip Memory Bandwidth of Merged DRAM/Logic LSIs. HPCA 1999: 218-222
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