"Asymmetric-access aware optimization for STT-RAM caches with process ..."

Yi Zhou et al. (2013)

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DOI: 10.1145/2483028.2483079

access: closed

type: Conference or Workshop Paper

metadata version: 2019-05-18

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Yi Zhou, Chao Zhang, Guangyu Sun, Kun Wang, Yu Zhang:
Asymmetric-access aware optimization for STT-RAM caches with process variations. ACM Great Lakes Symposium on VLSI 2013: 143-148

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