"FPGA Implementation of Sequence Detector for High-Speed PAM4 Wireline ..."

Chaolong Xu et al. (2024)

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DOI: 10.1145/3649476.3658741

access: closed

type: Conference or Workshop Paper

metadata version: 2024-06-18

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Chaolong Xu, Fangxu Lv, Zhengbin Pang, Liquan Xiao, Zhouhao Yang:
FPGA Implementation of Sequence Detector for High-Speed PAM4 Wireline Transceiver. ACM Great Lakes Symposium on VLSI 2024: 13-18

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