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"A low-power phase change memory based hybrid cache architecture."

Prasanth Mangalagiri et al. (2008)

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DOI: 10.1145/1366110.1366204

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

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  - https://dblp.org/rec/conf/glvlsi/MangalagiriSYNXIK08
Prasanth Mangalagiri, Karthik Sarpatwari, Aditya Yanamandra, Vijaykrishnan Narayanan, Yuan Xie, Mary Jane Irwin, Osama Awadel Karim:
A low-power phase change memory based hybrid cache architecture. ACM Great Lakes Symposium on VLSI 2008: 395-398

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