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"A novel ultra-fast heuristic for VLSI CAD steiner trees."
Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal (2003)
- Bharat Krishna, C. Y. Roger Chen, Naresh Sehgal:
A novel ultra-fast heuristic for VLSI CAD steiner trees. ACM Great Lakes Symposium on VLSI 2003: 192-197
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