"A Correlation Matrix Method of Clock Partitioning for Sequential Circuit ..."

Yong Chang Kim, Kewal K. Saluja, Vishwani D. Agrawal (1999)

> Home

Details and statistics

DOI: 10.1109/GLSV.1999.757438

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/KimSA99
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/KimSA99
Yong Chang Kim, Kewal K. Saluja, Vishwani D. Agrawal:
A Correlation Matrix Method of Clock Partitioning for Sequential Circuit Testability. Great Lakes Symposium on VLSI 1999: 300-

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.