"Design of Energy Efficient Posit Multiplier."

Aditya Anirudh Jonnalagadda et al. (2023)

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DOI: 10.1145/3583781.3590227

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-19

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Aditya Anirudh Jonnalagadda, Anil Kumar Uppugunduru, Sreehari Veeramachaneni, Syed Ershad Ahmed:
Design of Energy Efficient Posit Multiplier. ACM Great Lakes Symposium on VLSI 2023: 645-651

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