"A 6.16Gb/s 4.7pJ/bit/iteration LDPC decoder for IEEE 802.11ad standard in ..."

Hiroyuki Motozuka et al. (2015)

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DOI: 10.1109/GLOBALSIP.2015.7418406

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-30

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Hiroyuki Motozuka, Naoya Yosoku, Takenori Sakamoto, Takayuki Tsukizawa, Naganori Shirakata, Koji Takinami:
A 6.16Gb/s 4.7pJ/bit/iteration LDPC decoder for IEEE 802.11ad standard in 40nm LP-CMOS. GlobalSIP 2015: 1289-1292

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