"StML: Bridging the gap between FPGA design and HDL circuit description."

Dustin Peterson et al. (2013)

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DOI: 10.1109/FPT.2013.6718366

access: closed

type: Conference or Workshop Paper

metadata version: 2019-03-29

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Dustin Peterson, Oliver Bringmann, Thomas Schweizer, Wolfgang Rosenstiel:
StML: Bridging the gap between FPGA design and HDL circuit description. FPT 2013: 278-285

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