"Memory-Efficient Architecture for Accelerating Generative Networks on FPGA."

Shuanglong Liu et al. (2018)

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DOI: 10.1109/FPT.2018.00016

access: closed

type: Conference or Workshop Paper

metadata version: 2019-06-27

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Shuanglong Liu, Chenglong Zeng, Hongxiang Fan, Ho-Cheung Ng, Jiuxi Meng, Zhiqiang Que, Xinyu Niu, Wayne Luk:
Memory-Efficient Architecture for Accelerating Generative Networks on FPGA. FPT 2018: 30-37

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