"ParaLaR: A parallel FPGA router based on Lagrangian relaxation."

Chin Hau Hoo, Akash Kumar, Yajun Ha (2015)

> Home

Details and statistics

DOI: 10.1109/FPL.2015.7294012

access: closed

type: Conference or Workshop Paper

metadata version: 2024-05-07

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpl/HooKH15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpl/HooKH15
Chin Hau Hoo, Akash Kumar, Yajun Ha:
ParaLaR: A parallel FPGA router based on Lagrangian relaxation. FPL 2015: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.