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"One size does not fit all: Implementation trade-offs for iterative stencil ..."

Gaël Deest et al. (2017)

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DOI: 10.23919/FPL.2017.8056781

access: closed

type: Conference or Workshop Paper

metadata version: 2020-04-20

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  dblp key:
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Gaël Deest, Tomofumi Yuki, Sanjay V. Rajopadhye, Steven Derrien:
One size does not fit all: Implementation trade-offs for iterative stencil computations on FPGAs. FPL 2017: 1-8

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