"Modeling post-techmapping and post-clustering FPGA circuit depth."

Joydip Das et al. (2009)

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DOI: 10.1109/FPL.2009.5272315

access: closed

type: Conference or Workshop Paper

metadata version: 2020-12-29

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Joydip Das, Steven J. E. Wilton, Philip Heng Wai Leong, Wayne Luk:
Modeling post-techmapping and post-clustering FPGA circuit depth. FPL 2009: 205-211

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