"An analytical model relating FPGA architecture and place and route runtime."

Scott Y. L. Chin, Steven J. E. Wilton (2009)

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DOI: 10.1109/FPL.2009.5272519

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-21

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Scott Y. L. Chin, Steven J. E. Wilton:
An analytical model relating FPGA architecture and place and route runtime. FPL 2009: 146-153

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