"Towards bounded error recovery time in FPGA-based TMR circuits using ..."

Ediz Cetin et al. (2013)

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DOI: 10.1109/FPL.2013.6645571

access: closed

type: Conference or Workshop Paper

metadata version: 2017-06-15

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Ediz Cetin, Oliver Diessel, Lingkan Gong, Victor Lai:
Towards bounded error recovery time in FPGA-based TMR circuits using dynamic partial reconfiguration. FPL 2013: 1-4

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