"Hardware Synthesis of Weakly Consistent C Concurrency."

Nadesh Ramanathan et al. (2017)

> Home

Details and statistics

DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2017-02-03

- view
  - electronic edition @ acm.org
- export record
  dblp key:
  - conf/fpga/RamanathanFWC17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/RamanathanFWC17
Nadesh Ramanathan, Shane T. Fleming, John Wickerson, George A. Constantinides:
Hardware Synthesis of Weakly Consistent C Concurrency. FPGA 2017: 169-178

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.