"A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs."

Peichen Pan, Chih-Chang Lin (1998)

> Home

Details and statistics

DOI: 10.1145/275107.275118

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-06

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fpga/PanL98
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fpga/PanL98
Peichen Pan, Chih-Chang Lin:
A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs. FPGA 1998: 35-42

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.