"FPGA implementation of template matching using binary sum of absolute ..."

Aditya Rachman Putra, Fadhil Mochammad, Hans Herdian (2016)

> Home

Details and statistics

DOI: 10.1109/ICSENGT.2016.7849615

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-24

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/fit/PutraMH16
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/fit/PutraMH16
Aditya Rachman Putra, Fadhil Mochammad, Hans Herdian:
FPGA implementation of template matching using binary sum of absolute difference. ICSET 2016: 13-17

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.