"Reducing Compilation Time of Zhong's FPGA-Based SAT Solver."

Pak K. Chan et al. (1999)

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DOI: 10.1109/FPGA.1999.803709

access: closed

type: Conference or Workshop Paper

metadata version: 2023-09-28

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Pak K. Chan, Mark J. Boyd, Sezer Gören, K. Klenk, V. Kodavati, R. Kundu, M. Margolese, J. Sun, Katsuharu Suzuki, E. Thorne, X. Wang, J. Xu, M. Zhu:
Reducing Compilation Time of Zhong's FPGA-Based SAT Solver. FCCM 1999: 308-309

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