"Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D ..."

Shalabh Goyal, Abhijit Chatterjee, Mike Atia (2006)

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DOI: 10.1109/ETS.2006.39

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Shalabh Goyal, Abhijit Chatterjee, Mike Atia:
Reducing Sampling Clock Jitter to Improve SNR Measurement of A/D Converters in Production Test. ETS 2006: 165-172

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