"Assessment of the merits of CMOS technology scaling for analog circuit design."

Maarten Vertregt, Peter C. S. Scholtens (2004)

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DOI: 10.1109/ESSCIR.2004.1356615

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-29

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Maarten Vertregt, Peter C. S. Scholtens:
Assessment of the merits of CMOS technology scaling for analog circuit design. ESSCIRC 2004: 57-63

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