"A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter ..."

Ping Lu, Pietro Andreani, Antonio Liscidini (2011)

> Home

Details and statistics

DOI: 10.1109/ESSCIRC.2011.6045006

access: closed

type: Conference or Workshop Paper

metadata version: 2020-03-27

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/esscirc/LuAL11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/esscirc/LuAL11
Ping Lu, Pietro Andreani, Antonio Liscidini:
A 90nm CMOS gated-ring-oscillator-based Vernier time-to-digital converter for DPLLs. ESSCIRC 2011: 459-462

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.