"A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset ..."

Rucheng Jiang et al. (2023)

> Home

Details and statistics

DOI: 10.1109/ESSCIRC59616.2023.10268690

access: closed

type: Conference or Workshop Paper

metadata version: 2023-10-23

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/esscirc/JiangWNTY23
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/esscirc/JiangWNTY23
Rucheng Jiang, Han Wu, Kian Ann Ng, Chne-Wuen Tsai, Jerald Yoo:
A 13-bit 70MS/s SAR-Assisted 2-bit/cycle Cyclic ADC with Offset Cancellation and Slack-Borrowing Logic. ESSCIRC 2023: 281-284

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.