"A 12 bit, 2-MS/s, 0.016-mm2 column-parallel readout cyclic ADC, ..."

Saikrishna Ganta et al. (2016)

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DOI: 10.1109/ESSCIRC.2016.7598270

access: closed

type: Conference or Workshop Paper

metadata version: 2017-05-26

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Saikrishna Ganta, Alfredo Tomasini, Ajay Taparia, Taehee Cho, Mandar Kulkarni, Ozan Erdogan:
A 12 bit, 2-MS/s, 0.016-mm² column-parallel readout cyclic ADC, having 50% reduced slew rate requirement due to feed-forward spike eliminator. ESSCIRC 2016: 173-176

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