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"A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access ..."

Sylvain Clerc et al. (2012)

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DOI: 10.1109/ESSCIRC.2012.6341317

access: closed

type: Conference or Workshop Paper

metadata version: 2022-04-09

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  - conf/esscirc/ClercAGGR12
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Sylvain Clerc, Fady Abouzeid, Gilles Gasiot, David Gauthier, Philippe Roche:
A 65nm SRAM achieving 250mV retention and 350mV, 1MHz, 55fJ/bit access energy, with bit-interleaved radiation Soft Error tolerance. ESSCIRC 2012: 313-316

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