"All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link ..."

Yury Antonov et al. (2015)

> Home

Details and statistics

DOI: 10.1109/ECCTD.2015.7300035

access: closed

type: Conference or Workshop Paper

metadata version: 2018-11-02

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/ecctd/AntonovTSR15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ecctd/AntonovTSR15
Yury Antonov, Tero Tikka, Kari Stadius, Jussi Ryynänen:
All-digital phase-locked loop in 40 nm CMOS for 5.8 Gbps serial link transmitter. ECCTD 2015: 1-4

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.