"Description-Level Optimisation of Synthesisable Asynchronous Circuits."

Luis A. Tarazona et al. (2010)

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DOI: 10.1109/DSD.2010.71

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Luis A. Tarazona, Doug A. Edwards, Andrew Bardsley, Luis A. Plana:
Description-Level Optimisation of Synthesisable Asynchronous Circuits. DSD 2010: 441-448

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