"Evaluating Dataflow and Pipelined Vector Processing Architectures for FPGA ..."

Michael Freeman (2006)

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DOI: 10.1109/DSD.2006.51

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Michael Freeman:
Evaluating Dataflow and Pipelined Vector Processing Architectures for FPGA Co-processors. DSD 2006: 127-130

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