"An Ultra Energy Efficient Neuron enabled by Tunneling in Sub-threshold ..."

Tanmay Chavan et al. (2018)

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DOI: 10.1109/DRC.2018.8442229

access: closed

type: Conference or Workshop Paper

metadata version: 2020-10-01

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Tanmay Chavan, S. Dutta, Nihar R. Mohapatra, Udayan Ganguly:
An Ultra Energy Efficient Neuron enabled by Tunneling in Sub-threshold Regime on a Highly Manufacturable 32 nm SOI CMOS Technology. DRC 2018: 1-2

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