"Online Testable Reversible Logic Circuit Design using NAND Blocks."

Dilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson (2004)

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DOI: 10.1109/DFT.2004.47

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Dilip P. Vasudevan, Parag K. Lala, James Patrick Parkerson:
Online Testable Reversible Logic Circuit Design using NAND Blocks. DFT 2004: 324-331

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