"A Power Transmission Line Fault Distance Estimation VLSI Chip: Design and ..."

Erik MacLean, Vijay K. Jain (2011)

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DOI: 10.1109/DFT.2011.17

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Erik MacLean, Vijay K. Jain:
A Power Transmission Line Fault Distance Estimation VLSI Chip: Design and Defect Tolerance. DFT 2011: 243-251

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