"Concurrent Error Detection for Combinational Logic Blocks Implemented with ..."

Andrzej Krasniewski (2008)

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DOI: 10.1109/DDECS.2008.4538760

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

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Andrzej Krasniewski:
Concurrent Error Detection for Combinational Logic Blocks Implemented with Embedded Memory Blocks of FPGAs. DDECS 2008: 74-79

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