"A design of an area-efficient 10-GHz phase-locked loop for ..."

Woo-Rham Bae, Deog-Kyoon Jeong, Byoung-Joo Yoo (2014)

> Home

Details and statistics

DOI: 10.1109/DDECS.2014.6868763

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-24

- view
  authority control:
- export record
  dblp key:
  - conf/ddecs/BaeJY14
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/ddecs/BaeJY14
Woo-Rham Bae, Deog-Kyoon Jeong, Byoung-Joo Yoo:
A design of an area-efficient 10-GHz phase-locked loop for source-synchronous, multi-channel links in 90-nm CMOS technology. DDECS 2014: 55-58

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.