"Hardware coprocessor integration with NEORV32: characterization for ..."

Unai Sainz-Estebanez, Unai Martinez-Corral, Koldo Basterretxea (2024)

> Home

Details and statistics

DOI: 10.1109/DCIS62603.2024.10769177

access: closed

type: Conference or Workshop Paper

metadata version: 2025-01-13

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - conf/dcis/Sainz-Estebanez24
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/dcis/Sainz-Estebanez24
Unai Sainz-Estebanez, Unai Martinez-Corral, Koldo Basterretxea:
Hardware coprocessor integration with NEORV32: characterization for efficient implementation of RISC-V-based AI SoCs. DCIS 2024: 1-6

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.