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"A power-efficient 3-D on-chip interconnect for multi-core accelerators ..."
Kyungsu Kang et al. (2016)
- Kyungsu Kang, Sangho Park, Jong-Bae Lee, Luca Benini, Giovanni De Micheli:
A power-efficient 3-D on-chip interconnect for multi-core accelerators with stacked L2 cache. DATE 2016: 1465-1468
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