"FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash ..."

Syed Azhar Ali Zaidi et al. (2013)

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DOI: —

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type: Conference or Workshop Paper

metadata version: 2021-08-09

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  - https://dblp.org/rec/conf/dasip/ZaidiACMM13
Syed Azhar Ali Zaidi, Muhammad Awais, Carlo Condo, Maurizio Martina, Guido Masera:
FPGA accelerator of Quasi cyclic EG-LDPC codes decoder for NAND flash memories. DASIP 2013: 190-195

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